怎么发不成功

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity ymq is
port
(
num:in std_logic_vector(3 downto 0);
dout:out std_logic_vector(6 downto 0)
);
end ymq;
architecture a1 of ymq is
begin
CASE num IS
when "0000"=> dout<='1111110';
when "0001"=> dout<='0110000';
when "0010"=> dout<='1101101';
when "0011"=> dout<='1111001';
when "0100"=> dout<='0110011';
when "0101"=> dout<='1011011';
when "0110"=> dout<='1011111';
when "0111"=> dout<='1110000';
when "1000"=> dout<='1111111';
when "1001"=> dout<='1111011';
when others => dout<='0000000';
end a1;